Should I use DCM for every FPGA design?



I am a newbie in Xilinx FPGA and am trying to prototype my own
architecture. I tried the tutorial about stopwatch. Everything is OK.

Then I tried a simple design "3-bit counters". The behavioral model and
translate model works. But the post-map model doesn't work. I don't
know why?

Here I did't use DCM. I have the clk pin feed to my counter directly.
Could this cause a problem?Thanks,

.



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