Re: Fastest way to compute floating point log and exp

Marc Battyani wrote:

I'm looking at the fastest way to compute floating point (32bit) log and exp
on an FPGA (Stratix II or Virtex 4). It must be faster than a 3.6GHz Xeon
which can do that in 18.5 clock cycles on average on a 1000 float vector
(using SSE3)

So far I've found that with a few tables and floating point MUL and ADD
blocks I should be able to do that at 160MHz on a Stratix II (not tested
yet). It's still slower than the Xeon but at least it's close. I've looked
at cordic at a glance, but it looks slower or bigger if totally unrolled.

Any ideas or pointers on a better way to do that?

Thanks

Marc




You didn't mention how much precision you need, nor for that matter what the log base is to be. Log
is actually easier to compute for a floating point argument, since the significand is already presumably
normalized, which reduces the complexity of computing the log since the range is limited. for fixed point,
the usual approach is to normalize it first, essentially converting to floating point. Log base 2 is a little
bit easier than other bases because the floating point exponent is the integer portion of the log. The fraction
portion can be computed with a small (4 input) look-up to get you to 1/2 dB or so. If you need more
precision, there are iterative techniques that can get you to whatever precision you need. Exponent is the
reverse: you use a look-up to exponentiate the fractional portion and then use the integer portion to control
how much the exponentiated fraction is shifted. This can be pipelined, and run at over 200 MS/sec in a single
thread in Spartan3 FPGAs, faster in premium devices.

Do you need the log in floating point too, or is it fixed point log notation? Most importantly, what is the precision requirement?

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--Ray Andraka, P.E.
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