Re: Superstitious learning in Computer Architecture

Andrew Reilly wrote:
On Thu, 24 Aug 2006 11:21:53 -0600, Steve Richfie1d wrote:

Even without going to logarithmic ALUs or wafer scale integration, there
is STILL an easy order of magnitude left to be collected by abandoning
the scalar-only architecture of the Pentium.

That was abandoned years ago. All modern CPUs do vector arithmetic.

Oh, _that_ kind of vector arithmetic. AN/FSQ-7, TX-2, AN/FSQ-32 style
vector arithmetic. I don't think he was talking about *that* kind of
vector arithmetic.

MMX or AltiVec, that sort of thing is just a step above scalars.

No, no, he means *real* vector arithmetic.

Where you have one instruction, and it plows through three arrays in
memory... doing one floating-point multiply per cycle in the pipelines
for just about as long as you want.

If you have an architecture that can pull *this* off without the
vectors having to be in the cache, you're talking about stuff like the
SX-6 from NEC. And its CPU is said not to require more transistors than
a modern Pentium.

Of course, you need to spend a lot on memory for one of those chips...
2,048-way interleaving means you can't just put in *one* memory stick;
let's see, now, 1,024 memory sticks at about $50 a pop... no wonder a
single-CPU SX-6r costs $180,000 since the memory is probably about half
of that!

And, given inflation, that's no more expensive than the original PDP-8!

I think that with a little work, they can make this more reasonable.
After all, there was a style of memory module that only had 16 data
lines, but yet kept up with conventional ones with 64 data lines... and
current conventional memory modules at least do two-way interleaving
these days.

John Savard

.

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