Re: Dell vs. eMachines T6420


"NoNoBadDog!" <nospam@xxxxxxxxxx> wrote in message news:DddKf.4230$yw4.1938@xxxxxxxxxxx
First of all, communicating through the caches is no better than having to communicate through the NB. You failed to acknowledge my response to
that issue.

This is roughly what I've heard from you recently, in order of presentation...

1) You stated that Intel processes use a shared L2, implying that they can
communicate on die.
2) Then you said Core Duo cores can't communicate with each other without
going off chip
3) You brought up an analogy of two people in cubes who have to leave the
cubes to communicate, associating that with the approach used in Core
Duo. I could only interpret that as an analogy to off-die communication and
a reasserting of #2.
4) You said the next proposed step in Intel dual cores is to add communication
across the L2 cache (best fit would be a description of what is already in the
Core Duo rather than something that is on the horizon), which you say is better
than the cubicle (offchip) scenario but it isn't efficient because it is somehow
like using walkie talkies. Even if we were on the same page, vague.
5) You again state that Core Duo cores can't communicate with each other (!)
6) You implicitly acknowledge that Core Duos communicate via shared L2, but
assert that communicating through caches is no better than going off die and
through the NB. Which would seem to contradict #4.

Was the response you speak of above in there somewhere?

I still maintain that Intel "Core Duo" chips are multicore, and not true dual core.

That's what I would expect. You helped illustrate the main point of contention
regarding what people consider to be "true dual core" and "not true dual core"
and that is really the only point I felt had to be made ;-)

Allowing communication across the L2 cache limits the use of *ONE* cache per clock, thus negating the advantage of the speed increase by allowing communication across the L2 cache. It does not matter how "independent" the caches are when they cannot be used simultaneously for on-die I/O.

Yes, supposedly both Core Duo cores cannot simultaneously access L2. All
I've been able to find on the subject is statements to that effect, some high level
descriptions of cache related enhancements designed to offset that, and one
benchmark on a pre-production Yonah suggesting that L2 latency went up
by 4 cycles over Dothan. I find it hard to weigh the benefits of the smart cache
against the costs without a more detailed analysis in hand. You're welcome
to provide supporting info for your claim that communicating through the NB
would outperform or at least equal the current smart cache approach. I only
ask that it be detailed and we be able to trace numbers back to a reliable
source.

Perhaps you fail to understand the point I am making, and you may not have taken the time to think things through.

Intel itself has admitted several things about its "Core Duo" philosophy:

1. The original "Dual Core" Intel procs were rushed to market simply to beat AMD to the retail shelf with a dual core proc.

2. Intel admits it fuses independent cores because it is cheaper and easier for them to do so.

If you would have said "Intel itself has admitted several things about its
Smithfield philosophy:" I wouldn't have a problem with the above. As it
stands, it inappropriate associates the Core Duo architecture/approach
with the former. You realize this I'm sure >:-|

It is this "cheaper and easier" philosophy that is hurting their competitiveness.

FWIW, I think Intel chose a logical and expedient approach to bring some
modestly improved products to market. I don't fault them for that. Would
those processors be better and more competitive if there were design
enhancements? Absolutely. This is not something I'd dwell on but you're
welcome to.

3. Single core Intel procs of the same core speed will outperform "Core Duo" chips of the same speed. No one seems to be bringing this up except in a few articles here and there.

Well don't be bashful, post some links. FWIW, the closest thing to what
you describe and that I've seen are benchmarks of Core Duo vs Dothan
Pentium-M. In a small number of benchmarks which don't take advantage
of the dual cores and other improvements and which are sensitive to the
L2 latency increase, the Pentium-M pulled ahead. To a certain extent at
least, some of that sort of thing is to be expected I think. There is no such
thing as a free lunch; you can't implement cache coherency protocols,
shared caches, etc without adding additional complexity and gate delays.

I am sorry that you are offended that AMD processors outperform Intel.

I'm offended by the suggestion that I'd be offended by a product being
better than another product. I mean, it would be one thing if I made some
meaningful contribution to making one of the products what it is. In cases
where I didn't (such as this), why would I have strong feelings either way?

I'm also offended by what seem to be some false and some misleading
statements tucked within excessive and at times overly simplistic anti-X
diatribe from a Y evangelist mission poster. Maybe I'm overreacting in
this case, maybe not.

As for your last comment, you are guilty of a lack of intellectual honesty. You deny every published test that shows that AMD outperforms Intel. It is as simple as that.

It would be fair to say that I've restricted my commentary to some specific,
finer issues which I thought worthy of comment while avoiding broad, blanket
debate regarding whose processor line is better. I honestly can't recall ever
allowing myself to get dragged into the latter. There are no ulterior motives
involved.

I would eagerly receive and acknowledge any suitably detailed research
papers, test reports, or what have you on the specific subject we've been
talking about... cross core data sharing/coherency as implemented in Core
Duo vs recent AMD dual cores. FWIW, I'm looking for something that
goes beyond the simple verbal descriptions and general multi-threading
benchmarks one typically comes across. A treatise if you will.
.

Relevant Pages

  • Re: Dell vs. eMachines T6420
    ... I still maintain that Intel "Core Duo" chips are multicore, ... Allowing communication across the L2 cache limits the use ... Intel itself has admitted several things about its "Core Duo" philosophy: ... cannot see or communicate with each other...Intel itself admits it does ...
    (alt.sys.pc-clone.dell)
  • Re: Dell vs. eMachines T6420
    ... to communicate through the NB. ... Then you said Core Duo cores can't communicate with each other without ... communication across the L2 cache. ...
    (alt.sys.pc-clone.dell)
  • Re: shared cache -- Re: SMP detection
    ... How is this any different than say an Intel Core Duo ... I believe they have a shared cache as well for each ...
    (freebsd-questions)
  • Re: shared cache -- Re: SMP detection
    ... How is this any different than say an Intel Core Duo ... I believe they have a shared cache as well for each ...
    (freebsd-questions)
  • Re: Dell vs. eMachines T6420
    ... logos, its reluctance to manufacture a true consumer level dual core processor (all Intel core duo processors are multi-core, the two cores cannot see or communicate with each other...Intel itself admits it does this because it is easier to manufacture and costs less). ... Making such a similar statement and suggesting that Intel ...
    (alt.sys.pc-clone.dell)